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NXP Semiconductors /LPC18xx /SCU /SDDELAY

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Interpret as SDDELAY

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SAMPLE_DELAY 0RESERVED 0DRV_DELAY 0RESERVED

Description

SD/MMC sample and drive delay register

Fields

SAMPLE_DELAY

SD/MMC sample delay. The delay value is SAMPLE_DELAY x 0.5 ns.
RESERVED

Reserved. Do not write ones to reserved register bits.
DRV_DELAY

SD/MMC drive delay. The delay value is DRV_DELAY x 0.5 ns. The values DRV_DELAY = 0 and DRV_DELAY = 1 are not allowed.
RESERVED

Reserved. Do not write ones to reserved register bits.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data